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CAD Engineer - PDV

Apple Santa Clara, California
cad engineer apple design team silicon devices cad physical design nodes collaborate education layout versus schematic (lvs)
March 19, 2023
Apple
Santa Clara, California
Summary Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Joining this group means you ll be responsible for crafting and building the technology that fuels Apple s devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a member of our CAD team, you will architect, develop, maintain and improve physical design verification (PDV) flows. The role requires you to work on flow and run set development for various technology nodes and tool sets. Working alongside the CAD team, you will have the opportunity to learn and collaborate with the custom digital/analog/mixed-signal design, physical design (PD) and chip integration teams. You will need to have experience with design rule checks (DRC) and layout versus schematic (LVS) runsets, writing from scratch and/or modify existing ones. Knowledge with Dummy Metal Fill generation and Design for Manufacturability (DFM) rules is a plus. Key Qualifications
  • Previous industry experience in Silicon chip design flows
  • Knowledge in Calibre/ICV runset coding for DRC/LVS/ERC/MFILL is required
  • Tapeout support and chip level PDV debug experience is a plus
  • Knowledge/scripting in programming languages such as Perl, Python, Tcl, Shell, Makefile or C.
  • Understanding in Silicon technology and experience with flow development in advanced nodes
Description - Improve and maintain physical verification flows and methodology - Collaborate with team members on flow automation and data generation - Install and support foundry PDV collateral for various technologies - Create in-house PDV rule decks for custom designs - Facilitate chip design process by debugging DRC/LVS results in custom IPs Education & Experience Minimum requirement of BS + 3 years of relevant industry experience. Additional Requirements Pay & Benefits
  • At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $130,000 and $242,000, and your base pay will depend on your skills, qualifications, experience, and location.

    Apple employees also have the opportunity to become an Apple shareholder through participation in Apple s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple s Employee Stock Purchase Plan. You ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

    Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

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